{A new mathematical model and control of a three-phase AC-DC voltage source converter}
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Title | {A new mathematical model and control of a three-phase AC-DC voltage source converter} |
Publication Type | Conference Paper |
Year of Publication | 1997 |
Authors | Blasko V, Kaura V |
Conference Name | Power Electronics, IEEE Transactions on |
ISBN Number | 0885-8993 VO - 12 |
Keywords | 140 kW, AC-DC power convertors, Bandwidth, Circuit synthesis, Converters, cross coupling elimination, Current control, current control loop, digital control, digital current regulators, digital signal processing chips, digital signal processor, electric current control, feedforward, feedforward signals, gains, low harmonic distortion, Mathematical model, power circuit, power conversion, power engineering computing, Regulators, sampling frequency, Signal synthesis, stationary reference frame, synchronous reference frame, synchronous reference-frame model, three-phase AC-DC voltage source converter, time constants, tracking capability improvement, Tracking loops, Voltage control, voltage control loop, voltage regulators |
Abstract | A new mathematical model of the power circuit of a three-phase voltage source converter (VSC) was developed in the stationary and synchronous reference frames. The mathematical model was then used to analyze and synthesize the voltage and current control loops for the VSC. Analytical expressions were derived for calculating the gains and time constants of the current and voltage regulators. The mathematical model was used to control a 140-kW regenerative VSC. The synchronous reference-frame model was used to define feedforward signals in the current regulators to eliminate the cross coupling between the d and q phases. It allowed the reduction of the current control loops to first-order plants and improved their tracking capability. The bandwidths of the current and voltage-control loops were found to be approximately 20 and 60 times (respectively) smaller than the sampling frequency. All control algorithms were implemented in a digital signal processor. All results of the analysis were experimentally verified |
DOI | 10.1109/63.554176 |
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